You already know that MATLAB is great for algorithm development and functional verification. But software simulation based verification to validate the implementation of an FPGA DSP design is still a major bottleneck. Hardware based verification is the solution, but custom proto boards are time consuming and tedious to operate. So how can you use MATLAB� and Simulink� to bridge the gap between functional verification and a working implementation of your design without custom proto-boards?
GateRocket now offers the proven benefit of its Device Native� method for reducing debug and verification time for FPGA verification of DSP designs. Thanks to integration with the MATLAB /Simulink DSP design system MathWorks, GateRocket's RocketDrive� and RocketVision� products provide unmatched visibility and simulation performance at the implementation-level for DSP designers.
Experience significant acceleration of your DSP design verification over HDL simulation AND enhanced debugging too!
DSP simulation in an HDL software simulator can be a long, slow process, even with production proven, DSP-optimized tools. The cold hard fact is that nothing can beat the speed of a hardware-in-the-loop strategy for DSP FPGA verification. RocketDrive delivers the needed performance with its easy-to-use hardware-in-the-loop approach that avoids the need for proto-boards and custom simulator interfaces.
Best of all, designers can interact with the design - all the way down to registers and gates in the actual FPGA - from the Simulink simulation environment through GateRocket's RocketVision debugging system. Errors in the implemented FPGA can quickly be traced and isolated in RocketVision while stimulus and analysis is controlled by Simulink.
The integrated MATLAB/GateRocket environment allows DSP designers to use familiar modeling and analysis tools, and interact with behavioral models in real-time, without the notoriously slow run times of RTL software simulation. In our online demonstration, you'll see actual FPGA hardware behavior but at run times that can be more than an order of magnitude faster than software simulation of RTL models.