Custom Silicon Solutions and SoC IP Bulletin | Q1 2021 Update
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In an exclusive interview, OpenFive's CEO, Dr. Shafy Eltoukhy, talks about OpenFive's goals for 2021
We are delivering a lot of HBM solutions for the high performance computing market, going down to 7nm, 5nm, 3nm and so on. We’re also staying ahead of the game by investing in More-than-Moore solutions with die-to-die (D2D) interfaces, chiplet technology and 2.5D packaging. By mixing and matching different technologies, we can offer chiplets that enable partitioning of the design into different functions, and the option to choose a process optimized for that particular function. The overall cost of the solution will be lower than going to a finer geometry process node that is very expensive. This area is very important to us moving forward. In the coming months, you will see many exciting new initiatives from OpenFive ranging from AI-enabled sub-systems to customizable D2D IP and chiplets with advanced 2.5D packaging, and we look forward to enabling customers to create domain-specific SoCs that are highly optimized for power, performance and cost... Read More...
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OpenFive HBM3 and Die-2-Die (D2D) interfaces combined with SiFive E76 RISC-V CPU core enable high performance chiplets and 2.5D based system-on-a-chip (SoC) designs...Read More...
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Latest Webinars On-Demand |
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Ethernet has been used as a mainstream solution for chip-to-chip and die-to-die connectivity. In this webinar, we reviewed some of the key required features of Ethernet MAC/PCS from 800G down to 10G. We have addressed various types of Forward Error Correction engines (FEC) to improve the BER of the channel/links. We have analyzed how the latest advances in packaging technology have allowed moving the ethernet functions from the main die to chiplets simplifying the system and improving the cost/ power/ performance of the overall solution.
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2021 promises to be the breakthrough year when 2.5D based custom SoCs and chiplets will play a very prominent role in turbo-charging cloud/ AI, HPC, networking and storage applications. In this webinar, you will learn more about how OpenFive is collaborating with its customers and partners to drive domain-specific innovations in Die-to-Die (D2D) IP, custom silicon and advanced package design methodologies.
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Interlaken chip-to-chip connectivity IP has been used for many years in networking and switching fabrics to move high throughput data between large chips. With advanced technology nodes, increasing chip sizes, and CPU cluster-based designs, Interlaken has found a unique spot as the protocol of choice for low latency, high throughput chip-to-chip connectivity. OpenFive is extending its 8th generation of Interlaken IP with the introduction of Interlaken-Low Latency (LL) IP, which will enable low latency chip-to-chip connectivity in HPC, AI/ML, enterprise, and cloud applications. Interlaken-LL IP can provide up to 256Gbps of reliable and scalable throughput between two chips; whereas the standard Interlaken IP from SiFive provides throughput of up to 1.2Tbps.
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AI technology has enabled electronic devices with the ability to not only see, but also understand the world around it. It enables a wide range of applications such as; self-driving cars, automated delivery robots drones, smart cities, augmented reality, intelligent home assistants, and much more. All of these require purpose-built SoCs to provide the optimal balance of performance and power. Learn how OpenFive's AI Vision Platform with CEVA's Vision and AI solutions can be customized for your end application.
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Product Briefs and Datasheets
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Technical Papers and Articles
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Industry and Partner Events
April 6, 2021
Design and Reuse IP SoC Silicon Valley 2021
Virtual Event
OpenFive participated in this year's D&R IP SoC Silicon Valley virtual event and presented a talk on "Die-to-Die Interface PHY and Controller Subsystem for Next Generation Chiplets".
March 16, 2021
Semiconductor360 Live 2021
Europe + Israel, Virtual Event
OpenFive exhibited at the Semiconductor360 Live virtual event and presented a talk on "Differentiated IP and Custom Silicon for AI and HPC".
February 7 & 8, 2021
SNUG INDIA 2021
Virtual Event
OpenFive presented a paper on “Design Analysis of 2.5D Interposer”.
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About OpenFive
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OpenFive is a solution-centric silicon company that is uniquely positioned to design processor agnostic SoC architectures.
With customizable and differentiated IP for Artificial Intelligence, Edge Computing, HPC, and Networking solutions, OpenFive develops domain-specific SoC architectures based on high-performance, highly-efficient, cost-optimized IP to deliver scalable, optimized, differentiated silicon.
OpenFive offers end-to-end expertise in Architecture, Design Implementation, Software, Silicon Validation and Manufacturing to deliver high-quality silicon.
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