Signal Integrity Blog, SiSoft at DesignCon and More
SI TechNeeks | December 2018
to Access Content
7 Steps to Successful Serial Link Layout, Part 3
The final piece in this series details often overlooked Manufacturing “gotchas” and Software “getchas” related to your serial links. We guarantee you’ll discover something new. This is
Signal Integrity, In Practice
QCD -> Tools -> Run COM Interface
Ever tried it? These videos show you how to apply COM (Channel Operating Margin) to your channels within QCD. Have a look, and
get the Kit
to try it out.
The Challenges of Measuring PAM4 Signals
SiSoft and leading test and measurement companies weigh in on how PAM4 has changed our ability to capture meaningful data and apply it to design decisions.
PCIe Gen4 Design Kit
16 Gbps is here. This Kit Includes Tx/Rx IBIS-AMI, topologies, and compliance masks you need to simulate and validate your AIC, SB, or embedded channel.
Kits also available.
SiSoft at DesignCon 2019
DDR5, 112 Gbps, IBIS-AMI, FEC – SiSoft will
present on these topics
and more. Come see us in Booth 935 as we celebrate
decades of innovation
year at DesignCon
. We Are Signal Integrity.
2018.07-SP1 Now Available
Enhancements for PAM4, DDR4, and Reports – see the
for complete details and an overview of the new functionality in 2018.07.
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