Average Design Cost for Basic SoCs Across all Geometries was $1.7M in 2017,says Semico Research
Phoenix, AZ - August 7, 2018
Semico Technology Brief -- System Design: More Options, More Design Starts?
Many alternative technologies are being offered to address major concerns in the IP and design market spaces. Dielets or Chiplets are one such technology that has gained momentum for their use in multi-die subsystems and systems. 

System Design: More Options, More Design Starts?,  a new Technology Brief from Semico, provides key insight into the dielet/chiplet technology and its possible adoption.

Contact Rick Vogelei at rickv@semico.com or 480-435-8564.
Artificial Intelligence
The emergence of the AI market represents the 'next big thing' for both the semiconductor industry as well as the overall economy. Deployment has already started in factory floor environments delivering better control and maintenance over a multitude of industrial processes and products. The net effect is better quality control, lower costs, better product reliability and more innovation in the process of creating the products themselves.

A new Semico Tech Brief, 
Artificial Intelligence: Powering the Next Generation of Processors
provides an analytical view of the current and potential impact of AI on the semiconductor market.
ESD Alliance members receive a discount!

Are you an ESD Alliance member? Get a discount on this report. Contact Rick at rickv@semico.com to find out more.  
The semiconductor industry today is faced with several substantial issues-not the least of which are the continuing rise in design costs for complex SoCs, the decrease in the incidence of first-time-right designs and the increase in the design cycle time against shrinking market windows and decreasing product life cycles. An additional factor has now been added to SoC design costs with the emergence of very complicated software applications intended to run on the SoC silicon. The costs of the software effort have outstripped the silicon design costs and have become the major part of the cost of these designs.  IP integration is also a growing part of design costs. Semico's new report SoC Silicon and Software 2018 Design Cost Analysis: How Rising Costs Impact SoC Design Starts addresses these and many other design concerns while reporting that the average design cost for Basic SoCs across all geometries in 2017 was $1.7 million.

"Analysis of design activity for the three types of SoC profiled in this report shows that while design costs at new nodes continue to increase, the average design cost at each node is not increasing as quickly, giving room for designers to still accomplish their silicon solutions at reasonable costs if they are prudent in their design selection," says Rich Wawrzyniak, Sr. Market Analyst for ASIC & SoC at Semico.  "For each of the three types of SoC there is still considerable activity at the older nodes of 90nm, 65nm and 40nm. Costs at these geometries are much less than at 10nm and 7nm so even though these newer designs cost much more, the average for all SoCs has dropped due to the increase in new designs for Basic SoC."
Key findings of the report include:
  • The average design cost for Value Multicore SoCs across all geometries was $4.8M in 2017.
  • The average design cost for all SoCs across all geometries is forecast to increase to $5.3M by 2023.
  • The number of 'first-time-right' designs has dropped at every process geometry since the 180nm node.
  • Silicon design costs at the 7nm node for an Advanced Performance Multicore SoC first-time effort are projected to be 23% higher than at the 10nm node.
In a unique, insightful look at this constantly evolving market, Semico Research's new report, SoC Silicon and Software 2018 Design Cost Analysis: How Rising Costs Impact SoC Design Starts , examines the primary forces and integration pressures that are driving this market today in 135 pages, with 41 tables and 64 graphs.  This study analyzes many important questions facing the semiconductor industry today including:
  1. What is the current cost for a Complex System-on-a-Chip (SoC) design, and what will it be in the near future?
  2. Is it possible to do SoC designs without maximizing the costs for these designs?
  3. What is the incidence of 'first-time-right' for these designs today and in the near future?
  4. How is the design cycle time for these designs changing?
  5. How do complicated software applications impact the design costs?
  6. How fast are IP integration costs rising, and how high will they go?
  7. What strategies are designers using to cope with rising design costs?
  8. What is the average silicon design cost today for each process geometry and SoC type, and how quickly is it rising?
  9. What impact will EDA tools that include some artificial intelligence (AI) and machine learning (ML) functionality have on design costs for complex silicon?

For pricing and additional information, please contact:


Rick Vogelei

Business Development

Phone: 602-997-0337

Email: rickv@semico.com


About Semico

Semico is a semiconductor marketing & consulting research company located in Phoenix, Arizona.  We offer custom consulting, portfolio packages, individual market research studies and premier industry conferences.


Rick Vogelei
(480) 435-8564
Business Development Executive

CALL Rick Today!