Ultra HDI e-bulletin -- October 2023

ASC now has the capability to fabricate ultra HDI technology, providing feature sizes well below what is achievable with traditional subtractive etch processing. We are reaching out to industry experts to ask for their opinions and advice on how to best take advantage of these new capabilities.

Ultra HDI Design Capabilities
September 2023 Ultra HDI e-bulletin
Featured Interview

With over 43 years of experience in electronic system design and EMC, Daniel Beeker provides application support for NXP Automotive customers worldwide. Daniel also supports NXP customers with special function development tools and instrumentation. Daniel specializes in EMC and signal integrity design techniques for systems and PCBs, especially in low-layer count designs. Daniel has completed over 250 PCB design evaluations for customers and internal NXP products to support this. Daniel teaches field-based design techniques at NXP and industry conferences worldwide, with more than 150 sessions and over 6,000 attendees since 2010. Daniel is involved with NXP IC package design, working on more than 25 IC designs. Daniel also supports IC device test fixture design, IC burn-in board design, and EMC test fixture design. Daniel collaborates with IC development tool teams to support improved EMC performance and improved hardware design guidelines.

 

Daniel is also a significant contributor to PCB Africa, which is a project to increase the expertise in the central African electrical engineering community.

Awareness of Ultra HDI is growing, and a significant share of the market is looking into designing with these ultra-fine features. Why do you feel that this new technology is important to the industry?


There is constant pressure to reduce geometries in electronics. The resulting reduction in package sizes, increased ball count, and pin pitch, coupled with reduced transistor technology, places unprecedented demands on the PCB. The required trace widths and spacings are pushing beyond 1.0 mil, and traditional fabrication techniques do not provide a cost-effective solution.


Once you pass the 0.5 mm pin pitch, UHDI presents a very attractive solution to routing density and signal integrity challenges. Signal integrity also poses significant challenges, and UHDI, coupled with additive manufacturing techniques, can provide a method to create small, controlled impedance transmission lines in unconventional ways. Imagine, single-layer 50-ohm routing. DDR5 and PAM4 can be easily tamed.



What key information points are critical to shortening the cycle for adoption - to more quickly begin taking advantage of the benefits of ultra HDI?


The most important issue is what I call "dielectric awareness." It is critical to understand which dielectric the signal energy begins, the required path through the board stack and the destination dielectric. With that understanding, next is knowing how to use these extremely small structures to create the required boundaries (waveguide walls) to contain the signals in all three dimensions as they travel through the board.


It is easy to just connect the signals, but much more difficult to manage the spaces, especially in the Z axis. Each pad-stack used for a signal must be accompanied by a matching pad-stack that connects the ground layers. When properly addressed, these fundamental issues will result in greater success in using this technology, and I believe that successful designs are the key to adopting this technology.


Understanding the difference in thermal performance poses another key issue. These structures are extremely small compared to traditional drill technologies, and creating structures that can help dissipate the heat these new ICs create may be the biggest challenge. Learn to embrace thermal modeling. Your product's life will depend on it.


As a Design expert that has navigated through multiple waves of technology advancements, what advice to you have for those who are looking at learning new techniques?


Focus on the science. EM field theory may seem daunting, but the energy is governed by simple rules, and the EM fields always follow those rules. If you understand that energy moves in the spaces and use your PCB design to create those spaces, you can take advantage of all new advances in IC and PCB fabrication technology. The geometries involved in the newer devices present simple problems. The structures are reduced, and the impact on the signals is ratiometric.


No advanced math is needed, just a belief in geometry and spaces, and you will be able to face any challenge, from the most advanced network server design to high-power automotive electric inverters.


Ralph Morrison always said, 


"Buildings have walls and halls.

People travel in the halls, not the walls.

Circuits have traces and spaces.

Energy and signals travel in the spaces, not the traces."

It's all about the space!


What are your outside interests - the hobbies that help you reboot?


It goes without saying that I love spicy food. Thai, Indian, Mexican, bring on the heat! My wife Renee and I have 7 children and 12 grandchildren between us, so family gatherings are a challenge, and I am usually the chief BBQ cook. Those are always a pleasant distraction. I also collect rocks and minerals, primarily focusing on beautiful crystals. I have a large citrine geode on my desk as a constant companion, and one of my favorite trips was to Herkimer, NY, to mine Herkimer Diamonds. I have quite a nice pile of those. I hope to take some of my grandchildren to the Badlands of North Dakota to look for dinosaur bones, as several of them share my interest in fossils. My wife and I love to dance, and do so when we can. Nothing quite as elegant as ballroom dancing, but we do alright because she is such a good dancer. OK, I admit it; I am an avid Pokémon GO player. I have gotten to level 43, and like most players, I need friends from Sandstorm and River (hint, hint). My nickname, of course, is FieldWizard.


In that vein, I really love spreading the knowledge I gained from working with Ralph Morrison, and I do everything I can to continue his legacy. PCB design reviews provide an excellent platform for teaching this valuable perspective, as well as presenting at seminars whenever possible. It's All About the Space!

ASC Capabilities
Technology Highlight

ASC has invested in ULTRA HDI technology. Contact us to learn more!


Capabilities:

  • Sub 25 micron lines and spaces
  • Available on board types- Rigid, Flex and Rigid-Flex.
  • Available on all material types.
  • Hybrid constructions using Ultra Fine line features on select layers; standard technology on others.
  • Microvias to 75 micron with copper filling.
  • Tight Impedance tolerances and improved signal integrity.

Ask how we can enable new Design freedoms for your work on Defense, Medical, and Commercial applications:


Contact John Johnson at jjohnson@asc-i.com

Frequently Asked Questions

Q: What are design considerations when designing with Via-In-Pad-Plated-Over (VIPPO)?


A: Via-In-Pad structures should be run on non-A-SAP layers. If needed, these structures should be used in an external mixed power/ ground structure with limited traces and line width of 3 mils with 5 mil spacing.


  • If via-in-pad is necessary along with ultra-fine lines: a copper-filled microvia should be used to route to the next layer down. This via should be 3 to 4 mils diameter, and the dielectric spacing should be no greater than the via diameter, preferably less - aspect ratio 1:1 max.


  • If top and bottom layers of the subassembly do not require ultra-fine line width technology: a buried via structure may be used. This via may be filled and plated over.
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